1. Field of the Invention
The present invention relates generally to multichip modules (MCMs) that include substrates with a number of semiconductor devices positioned at different locations on the surfaces thereof and, more specifically, to multichip modules that include routing elements overlapping portions of the multichip module substrate or one or more of the semiconductor devices on the substrate. In particular, the present invention relates to a routing element that provides additional circuit traces and that may be used to decrease the lengths of circuit paths across a multichip module.
2. Background of Related Art
Multichip modules have been developed to combine the functionalities of two or more semiconductor devices on a single carrier substrate, such as a circuit board. Conventional multichip modules have included a relatively large carrier substrate with a number of different semiconductor devices occupying different regions on one or both sides thereof. The semiconductor devices may communicate with one another or be connected with terminals of the carrier substrate that, in turn, facilitate communication between the semiconductor devices of the multichip module and external electronic componentry. In either event, electrical signals are typically conveyed by circuit traces that are carried by the carrier substrate.
As the feature densities of semiconductor devices continue to increase, the number of bond pads on semiconductor devices may also increase. In addition, the ever-increasing feature densities of semiconductor devices may be accompanied by decreases in the size of semiconductor devices which, in turn, may result in multichip modules that include increased numbers of semiconductor devices, again increasing the number of bond pads for a particular carrier substrate. Thus, the carrier substrates of state of the art multichip modules must carry ever-increasing numbers of circuit traces to keep up with the ever-increasing numbers of bond pads for which the carrier substrate must provide electrical connections.
To accommodate additional circuit traces, additional conductive and dielectric layers are typically added to carrier substrates. The increase in the manufacturing cost of carrier substrates, however, does not increase a proportionate amount for each additional layer. Rather, while carrier substrates with four layers cost only about 50% more than two-layer carrier substrates, six-layer carrier substrates are about ten times as expensive as two-layer carrier substrates due to decreased yields. Similar cost increases accompany further increases in the complexity of carrier substrates. As additional layers are often added for the purpose of providing relatively few additional circuit traces, the increased cost of a carrier substrate with these additional layers is difficult to justify in this cost-competitive industry.
In addition, due to the ever increasing numbers of circuit traces that are carried upon and within multichip module carrier substrates, the complexities and pathlengths of the circuit traces are also ever increasing in order to minimize electrical interference between traces.
Accordingly, there appears to be a need for apparatus to accommodate electrical connection of increasing numbers of bond pads without requiring an increase in the number of layers and, thus, the complexity of a multichip module carrier substrate. There also appears to be a need for apparatus that electrically connect mutually remote pads or terminals while providing the shortest possible pathlength therebetween.